The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Ansgar Fehnker: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ansgar Fehnker, Peng Gao
    Formal Verification and Simulation for Performance Analysis for Probabilistic Broadcast Protocols. [Citation Graph (0, 0)][DBLP]
    ADHOC-NOW, 2006, pp:128-141 [Conf]
  2. Ansgar Fehnker, Bruce H. Krogh
    Hybrid System Verification Is Not a Sinecure: The Electronic Throttle Control Case Study. [Citation Graph (0, 0)][DBLP]
    ATVA, 2004, pp:263-277 [Conf]
  3. Kim Guldstrand Larsen, Gerd Behrmann, Ed Brinksma, Ansgar Fehnker, Thomas Hune, Paul Pettersson, Judi Romijn
    As Cheap as Possible: Efficient Cost-Optimal Reachability for Priced Timed Automata. [Citation Graph (0, 0)][DBLP]
    CAV, 2001, pp:493-505 [Conf]
  4. Henning Dierks, Ansgar Fehnker, Angelika Mader, Frits W. Vaandrager
    Operational and Logical Semantics for Polling Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1998, pp:29-40 [Conf]
  5. Gerd Behrmann, Ansgar Fehnker, Thomas Hune, Kim Guldstrand Larsen, Paul Pettersson, Judi Romijn, Frits W. Vaandrager
    Minimum-Cost Reachability for Priced Timed Automata. [Citation Graph (0, 0)][DBLP]
    HSCC, 2001, pp:147-161 [Conf]
  6. Ansgar Fehnker
    Automotive Control Revisited: Linear Inequalities as Approximation of Reachable Sets. [Citation Graph (0, 0)][DBLP]
    HSCC, 1998, pp:110-125 [Conf]
  7. Ansgar Fehnker, Edmund M. Clarke, Sumit Kumar Jha, Bruce H. Krogh
    Refining Abstractions of Hybrid Systems Using Counterexample Fragments. [Citation Graph (0, 0)][DBLP]
    HSCC, 2005, pp:242-257 [Conf]
  8. Ansgar Fehnker, Franjo Ivancic
    Benchmarks for Hybrid Systems Verification. [Citation Graph (0, 0)][DBLP]
    HSCC, 2004, pp:326-341 [Conf]
  9. Bill Aldrich, Ansgar Fehnker, Peter H. Feiler, Zhi Han, Bruce H. Krogh, Eric Lim, Shiva Sivashankar
    Managing Verification Activities Using SVM. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2004, pp:61-75 [Conf]
  10. Tobias Amnell, Gerd Behrmann, Johan Bengtsson, Pedro R. D'Argenio, Alexandre David, Ansgar Fehnker, Thomas Hune, Bertrand Jeannet, Kim Guldstrand Larsen, M. Oliver Möller, Paul Pettersson, Carsten Weise, Wang Yi
    UPPAAL - Now, Next, and Future. [Citation Graph (0, 0)][DBLP]
    MOVEP, 2000, pp:99-124 [Conf]
  11. Ansgar Fehnker, Frits W. Vaandrager, Miaomiao Zhang
    Modeling and Verifying a Lego Car Using Hybrid I/O Automata. [Citation Graph (0, 0)][DBLP]
    QSIC, 2003, pp:280-289 [Conf]
  12. Ansgar Fehnker
    Scheduling a Steel Plant with Timed Automata. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1999, pp:280-286 [Conf]
  13. Edmund M. Clarke, Ansgar Fehnker, Zhi Han, Bruce H. Krogh, Olaf Stursberg, Michael Theobald
    Verification of Hybrid Systems Based on Counterexample-Guided Abstraction Refinement. [Citation Graph (0, 0)][DBLP]
    TACAS, 2003, pp:192-207 [Conf]
  14. Gerd Behrmann, Ansgar Fehnker
    Efficient Guiding Towards Cost-Optimality in UPPAAL. [Citation Graph (0, 0)][DBLP]
    TACAS, 2001, pp:174-188 [Conf]
  15. Edmund M. Clarke, Ansgar Fehnker, Zhi Han, Bruce H. Krogh, Joël Ouaknine, Olaf Stursberg, Michael Theobald
    Abstraction and Counterexample-Guided Refinement in Model Checking of Hybrid Systems. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2003, v:14, n:4, pp:583-604 [Journal]
  16. Ansgar Fehnker, Bruce H. Krogh
    Hybrid System Verification Is not a Sinecure - the Electronic Throttle Control Case Study. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2006, v:17, n:4, pp:885-902 [Journal]
  17. Ed Brinksma, Angelika Mader, Ansgar Fehnker
    Verification and optimization of a PLC control schedule. [Citation Graph (0, 0)][DBLP]
    STTT, 2002, v:4, n:1, pp:21-33 [Journal]
  18. Ansgar Fehnker, Lodewijk van Hoesel, Angelika Mader
    Modelling and Verification of the LMAC Protocol for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    IFM, 2007, pp:253-272 [Conf]
  19. Ansgar Fehnker, Ralf Huuck, Patrick Jayet, Michel Lussenburg, Felix Rauch
    Model Checking Software at Compile Time. [Citation Graph (0, 0)][DBLP]
    TASE, 2007, pp:45-56 [Conf]
  20. Ansgar Fehnker, Ralf Huuck, Patrick Jayet, Michel Lussenburg, Felix Rauch
    Goanna - A Static Model Checker. [Citation Graph (0, 0)][DBLP]
    FMICS/PDMC, 2006, pp:297-300 [Conf]

  21. Goanna: Syntactic Software Model Checking. [Citation Graph (, )][DBLP]


  22. Incremental False Path Elimination for Static Software Analysis. [Citation Graph (, )][DBLP]


  23. Counterexample Guided Path Reduction for Static Program Analysis. [Citation Graph (, )][DBLP]


  24. Formal Techniques for the Analysis of Wireless Networks. [Citation Graph (, )][DBLP]


  25. CaVi -- Simulation and Model Checking for Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  26. On the Impact of Modelling Choices for Distributed Information Spread. [Citation Graph (, )][DBLP]


  27. Some Assembly Required - Program Analysis of Embedded System Code. [Citation Graph (, )][DBLP]


  28. Automatic Bug Detection in Microcontroller Software by Static Program Analysis. [Citation Graph (, )][DBLP]


  29. Survey on Directed Model Checking. [Citation Graph (, )][DBLP]


  30. An Abstract Specification Language for Static Program Analysis. [Citation Graph (, )][DBLP]


Search in 0.070secs, Finished in 0.072secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002