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Themistoklis Haniotakis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. Matakias, Y. Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni, Aristides Efthymiou
    Fast, Parallel Two-Rail Code Checker with Enhanced Testability. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:149-156 [Conf]
  2. A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis
    SRAM oriented memory sense amplifier design in 0.18 /spl mu/m CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:145-148 [Conf]
  3. Themistoklis Haniotakis, Spyros Tragoudas, G. Pani
    Reduced Test Application Time Based on Reachability Analysis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:232-237 [Conf]
  4. Edward Flanigan, Themistoklis Haniotakis, Spyros Tragoudas
    An Improved Method for Identifying Linear Dependencies in Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:457-462 [Conf]
  5. Dimitri Kagaris, Themistoklis Haniotakis
    Transistor-Level Optimization of Supergates. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:682-690 [Conf]
  6. Khadija Stewart, Themistoklis Haniotakis, Spyros Tragoudas
    Design and Evaluation of a Security Scheme for Sensor Networks. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:197-201 [Conf]
  7. Michael N. Skoufis, Haibo Wang, Themistoklis Haniotakis, Spyros Tragoudas
    Glitch Control with Dynamic Receiver Threshold Adjustment. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:410-415 [Conf]
  8. Dimitri Kagaris, Themistoklis Haniotakis
    Transistor-Level Synthesis for Low-Power Applications. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:607-612 [Conf]
  9. Maria K. Michael, Themistoklis Haniotakis, Spyros Tragoudas
    A unified framework for generating all propagation functions for logic errors and events. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:6, pp:980-986 [Journal]
  10. Themistoklis Haniotakis, Y. Tsiatouhas, Dimitris Nikolos, Costas Efstathiou
    Testable Designs of Multiple Precharged Domino Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:4, pp:461-465 [Journal]
  11. Dimitrios Kagaris, Themistoklis Haniotakis
    A Methodology for Transistor-Efficient Supergate Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:4, pp:488-492 [Journal]

  12. A High-Performance Bus Architecture for Strongly Coupled Interconnects. [Citation Graph (, )][DBLP]


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