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Avinash Karanth Kodi:
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- Avinash Karanth Kodi, Ahmed Louri
A Scalable Architecture for Distributed Shared Memory Multiprocessors Using Optical Interconnects. [Citation Graph (0, 0)][DBLP] IPDPS, 2004, pp:- [Conf]
- Avinash Karanth Kodi, Ahmed Louri
Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2005, v:25, n:1, pp:41-49 [Journal]
- Ahmed Louri, Avinash Karanth Kodi
An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs). [Citation Graph (0, 0)][DBLP] IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:12, pp:1093-1104 [Journal]
- Avinash Karanth Kodi, Ahmed Louri
Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems. [Citation Graph (0, 0)][DBLP] IPDPS, 2007, pp:1-10 [Conf]
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. [Citation Graph (, )][DBLP]
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. [Citation Graph (, )][DBLP]
NBTI aware workload balancing in multi-core systems. [Citation Graph (, )][DBLP]
Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). [Citation Graph (, )][DBLP]
Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. [Citation Graph (, )][DBLP]
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. [Citation Graph (, )][DBLP]
On-Chip photonic interconnects for scalable multi-core architectures. [Citation Graph (, )][DBLP]
Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores. [Citation Graph (, )][DBLP]
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