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Roman Obermaisser :
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Roman Obermaisser , Philipp Peti , Hermann Kopetz Virtual Gateways in the DECOS Integrated Architecture. [Citation Graph (0, 0)][DBLP ] IPDPS, 2005, pp:- [Conf ] Philipp Peti , Roman Obermaisser , Astrit Ademaj , Hermann Kopetz A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture. [Citation Graph (0, 0)][DBLP ] IPDPS, 2005, pp:- [Conf ] Roman Obermaisser , Philipp Peti Realization of virtual networks in the DECOS integrated architecture. [Citation Graph (0, 0)][DBLP ] IPDPS, 2006, pp:- [Conf ] Bernhard Huber , Roman Obermaisser , Philipp Peti MDA-Based Development in the DECOS Integrated Architecture - Modeling the Hardware Platfor. [Citation Graph (0, 0)][DBLP ] ISORC, 2006, pp:43-52 [Conf ] Philipp Peti , Roman Obermaisser Diagnostic Framework for Integrated Time-Triggered Architectures. [Citation Graph (0, 0)][DBLP ] ISORC, 2006, pp:539-549 [Conf ] Philipp Peti , Roman Obermaisser , Fulvio Tagliabo , A. Marino , S. Cerchio An Integrated Architecture for Future Car Generations. [Citation Graph (0, 0)][DBLP ] ISORC, 2005, pp:2-13 [Conf ] Roman Obermaisser Message Reordering for the Reuse of CAN-based Legacy Applications in a Time-Triggered Architecture. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 2006, pp:301-310 [Conf ] Philipp Peti , Roman Obermaisser , Hermann Kopetz Out-of-Norm Assertions. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:280-291 [Conf ] Bernhard Huber , Philipp Peti , Roman Obermaisser , Christian El Salloum Using RTAI/LXRT for Partitioning in a Prototype Implementation of the DECOS Architecture. [Citation Graph (0, 0)][DBLP ] WISES, 2005, pp:3-16 [Conf ] Philipp Peti , Roman Obermaisser , Harald Paulitsch The Diagnostic Architecture of the PEGASUS Project Car. [Citation Graph (0, 0)][DBLP ] WISES, 2005, pp:163-174 [Conf ] Roman Obermaisser , Philipp Peti , Hermann Kopetz Virtual Networks in an Integrated Time-Triggered Architecture. [Citation Graph (0, 0)][DBLP ] WORDS, 2005, pp:241-253 [Conf ] Roman Obermaisser , Philipp Peti , Bernhard Huber , Christian El Salloum DECOS: an integrated time-triggered architecture. [Citation Graph (0, 0)][DBLP ] Elektrotechnik und Informationstechnik, 2006, v:123, n:3, pp:- [Journal ] Bernhard Leiner , Martin Schlager , Roman Obermaisser , Bernhard Huber A Comparison of Partitioning Operating Systems for Integrated Systems. [Citation Graph (0, 0)][DBLP ] SAFECOMP, 2007, pp:342-355 [Conf ] Martin Schlager , Roman Obermaisser , Wilfried Elmenreich A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture. [Citation Graph (0, 0)][DBLP ] SEUS, 2007, pp:159-170 [Conf ] Roman Obermaisser , Hermann Kopetz , Christian El Salloum , Bernhard Huber Error Containment in the Time-Triggered System-On-a-Chip Architecture. [Citation Graph (0, 0)][DBLP ] IESS, 2007, pp:339-352 [Conf ] Philipp Peti , Roman Obermaisser , Harald Paulitsch Investigating Connector Faults in the Time-Triggered Architecture. [Citation Graph (0, 0)][DBLP ] ETFA, 2006, pp:887-896 [Conf ] Roman Obermaisser , Philipp Peti , Fulvio Tagliabo An integrated architecture for future car generations. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 2007, v:36, n:1-2, pp:101-133 [Journal ] A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management. [Citation Graph (, )][DBLP ] A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR. [Citation Graph (, )][DBLP ] Periodic Finite-State Machines. [Citation Graph (, )][DBLP ] Temporal and Spatial Partitioning of a Time-Triggered Operating System Based on Real-Time Linux. [Citation Graph (, )][DBLP ] Fundamental Design Principles for Embedded Systems: The Architectural Style of the Cross-Domain Architecture GENESYS. [Citation Graph (, )][DBLP ] A Model-Driven Framework for the Generation of Gateways in Distributed Real-Time Systems. [Citation Graph (, )][DBLP ] A Comparison of NoTA and GENESYS. [Citation Graph (, )][DBLP ] The GENESYS Architecture: A Conceptual Model for Component-Based Distributed Real-Time Systems. [Citation Graph (, )][DBLP ] Formal Specification of Gateways in Integrated Architectures. [Citation Graph (, )][DBLP ] Integrating Automotive Applications Using Overlay Networks on Top of a Time-Triggered Protocol. [Citation Graph (, )][DBLP ] Composability in the time-triggered system-on-chip architecture. [Citation Graph (, )][DBLP ] Search in 0.015secs, Finished in 0.316secs