The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Rodrigo Soares: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva
    X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:171- [Conf]
  2. Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva
    X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2003, pp:260-268 [Conf]
  3. Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo
    When reconfigurable architecture meets network-on-chip. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:216-221 [Conf]
  4. Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva
    A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:225-230 [Conf]

  5. Cache coherency communication cost in a NoC-based MPSoC platform. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002