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Virendra J. Marathe:
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Publications of Author
- Virendra J. Marathe, Mark Moir, Nir Shavit
Composite Abortable Locks. [Citation Graph (0, 0)][DBLP] IPDPS, 2006, pp:1-10 [Conf]
- Virendra J. Marathe, Tim Harris, James R. Larus
Featherweight transactions: decoupling threads and atomic blocks. [Citation Graph (0, 0)][DBLP] PPOPP, 2007, pp:134-135 [Conf]
- Virendra J. Marathe, Mark Moir
Efficient nonblocking software transactional memory. [Citation Graph (0, 0)][DBLP] PPOPP, 2007, pp:136-137 [Conf]
- Virendra J. Marathe, William N. Scherer III, Michael L. Scott
Adaptive Software Transactional Memory. [Citation Graph (0, 0)][DBLP] DISC, 2005, pp:354-368 [Conf]
- Michael F. Spear, Virendra J. Marathe, William N. Scherer III, Michael L. Scott
Conflict Detection and Validation Strategies for Software Transactional Memory. [Citation Graph (0, 0)][DBLP] DISC, 2006, pp:179-193 [Conf]
- Arrvindh Shriraman, Michael F. Spear, Hemayet Hossain, Virendra J. Marathe, Sandhya Dwarkadas, Michael L. Scott
An integrated hardware-software approach to flexible transactional memory. [Citation Graph (0, 0)][DBLP] ISCA, 2007, pp:104-115 [Conf]
- Michael L. Scott, Michael F. Spear, Luke Dalessandro, Virendra J. Marathe
Transactions and privatization in Delaunay triangulation. [Citation Graph (0, 0)][DBLP] PODC, 2007, pp:336-337 [Conf]
- Michael F. Spear, Virendra J. Marathe, Luke Dalessandro, Michael L. Scott
Privatization techniques for software transactional memory. [Citation Graph (0, 0)][DBLP] PODC, 2007, pp:338-339 [Conf]
- Virendra J. Marathe, Michael F. Spear, Michael L. Scott
Transaction Safe Nonblocking Data Structures. [Citation Graph (0, 0)][DBLP] DISC, 2007, pp:488-489 [Conf]
Scalable Techniques for Transparent Privatization in Software Transactional Memory. [Citation Graph (, )][DBLP]
Ordering-Based Semantics for Software Transactional Memory. [Citation Graph (, )][DBLP]
Toward high performance nonblocking software transactional memory. [Citation Graph (, )][DBLP]
A comprehensive strategy for contention management in software transactional memory. [Citation Graph (, )][DBLP]
Simplifying concurrent algorithms by exploiting hardware transactional memory. [Citation Graph (, )][DBLP]
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