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Jiangmin Gu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jiangmin Gu, Chip-Hong Chang
    Ultra low voltage, low power 4-2 compressor for high speed multiplications. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:321-324 [Conf]
  2. Yajuan He, Chip-Hong Chang, Jiangmin Gu, Hossam A. H. Fahmy
    A novel covalent redundant binary Booth encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:69-72 [Conf]
  3. Mingyan Zhang, Jiangmin Gu, Chip-Hong Chang
    A novel hybrid pass logic with static CMOS output drive full-adder cell. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:317-320 [Conf]
  4. Jiangmin Gu, Chip-Hong Chang, Kiat-Seng Yeo
    An interconnect optimized floorplanning of a scalar product macrocell. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:465-468 [Conf]
  5. Chip-Hong Chang, Jiangmin Gu, Mingyan Zhang
    A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:6, pp:686-695 [Journal]

  6. An area efficient 64-bit square root carry-select adder for low power applications. [Citation Graph (, )][DBLP]

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