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James A. Barby :
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James A. Barby Switched-Current Filter Models for Frequency Analysis in the Continuous-time Domain. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1427-1430 [Conf ] S. M. GadelRab , James A. Barby , Savvas G. Chamberlain An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages. [Citation Graph (0, 0)][DBLP ] ISCAS, 1995, pp:897-900 [Conf ] Michael M. Yang , James A. Barby A novel fast low voltage dynamic threshold true single phase clocking adiabatic circuit. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2004, pp:289-292 [Conf ] James A. Barby , Jiri Vlach , Kishore Singhal Polynomial splines for MOSFET model approximation. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:5, pp:557-566 [Journal ] Genhong Ruan , Jiri Vlach , James A. Barby Current-limited switch-level timing simulator for MOS logic networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:659-667 [Journal ] Genhong Ruan , Jiri Vlach , James A. Barby Logic simulation with current-limited switches. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:2, pp:133-141 [Journal ] Genhong Ruan , Jiri Vlach , James A. Barby , Ajoy Opal Analog functional simulator for multilevel systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:5, pp:565-576 [Journal ] Jiri Vlach , James A. Barby , Anthony Vannelli , T. Talkhan , C.-J. Richard Shi Group delay as an estimate of delay in logic. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:7, pp:949-953 [Journal ] Search in 0.001secs, Finished in 0.001secs