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Gary Block: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Stephen Bates, Gary Block
    A memory-based architecture for FPGA implementations of low-density parity-check convolutional decoders. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:336-339 [Conf]
  2. Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge, Paul L. Springer, Gary Block
    A Heterogeneous Lightweight Multithreaded Architecture. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]

  3. Selection and Use of Programmable Logic in Flight Applications. [Citation Graph (, )][DBLP]


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