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Shubha Bommalingaiahnapallya:
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- Shubha Bommalingaiahnapallya, Ramesh Harjani
Low power implementation of an n-tone Sigma Delta converter. [Citation Graph (0, 0)][DBLP] ISCAS (1), 2004, pp:461-464 [Conf]
- Shubha Bommalingaiahnapallya, Ramesh Harjani
Process tolerant design of N-tone Sigma-Delta converters. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2005, pp:4630-4633 [Conf]
- Byunghoo Jung, Shubha Bommalingaiahnapallya, Ramesh Harjani
Power optimized LC VCO and mixer co-design. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2005, pp:4393-4396 [Conf]
- Shubha Bommalingaiahnapallya, Kin-Joe Sham, Mahmoud Reza Ahmadi, Ramesh Harjani
High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:3896-3899 [Conf]
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