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Mats Høvin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin
    Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:193-196 [Conf]
  2. Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin
    Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:345-348 [Conf]
  3. Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
    Extreme low-voltage floating-gate CMOS transconductance amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:37-40 [Conf]
  4. Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
    Floating-gate CMOS differential analog inverter for ultra low-voltage applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:9-12 [Conf]
  5. Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
    Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:838-841 [Conf]
  6. Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin
    A novel floating-gate multiple-valued CMOS full-adder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:877-880 [Conf]
  7. Mats Høvin, Dag T. Wisland, Yngvar Berg, Tor Sverre Lande
    A low-voltage sinc/sup 2/ decimator implemented by a new circuit technique using floating-gate MOS transistors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:397-400 [Conf]
  8. Mats Høvin, Dag T. Wisland, Yngvar Berg, J. T. Marienborg, Tor Sverre Lande
    Delta-sigma modulation in single neurons. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:617-620 [Conf]
  9. Yngvar Berg, Øivind Næss, Snorre Aunet, R. Jensen, Mats Høvin
    Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:385-388 [Conf]

  10. An Indirect Approach to the Three-Dimensional Multi-pipe Routing Problem. [Citation Graph (, )][DBLP]


  11. Evolutionary Approaches to the Three-dimensional Multi-pipe Routing Problem: A Comparative Study Using Direct Encodings. [Citation Graph (, )][DBLP]


  12. Indirect Online Evolution - A Conceptual Framework for Adaptation in Industrial Robotic Systems. [Citation Graph (, )][DBLP]


  13. Pareto Optimal Based Evolutionary Approach for Solving Multi-Objective Facility Layout Problem. [Citation Graph (, )][DBLP]


  14. Multi-objective evolutionary approach for solving facility layout problem using local search. [Citation Graph (, )][DBLP]


  15. Adaptive Facial Behaviour using Selected Machine Learning Methods. [Citation Graph (, )][DBLP]


  16. Coevolving heuristics for the Distributor's Pallet Packing Problem. [Citation Graph (, )][DBLP]


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