The SCEAS System
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## Search the dblp DataBase
Yasuaki Inoue:
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## Publications of Author- Yu Imai, Kiyotaka Yamamura, Yasuaki Inoue
**An efficient homotopy method for finding DC operating points of nonlinear circuits.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2005, pp:4911-4914 [Conf] - Zhang-cai Huang, Atsushi Kurokawa, Yasuaki Inoue
**Effective capacitance for gate delay with RC loads.**[Citation Graph (0, 0)][DBLP] ISCAS (3), 2005, pp:2795-2798 [Conf] - Yasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura, M. Ando
**An effective initial solution algorithm for globally convergent homotopy methods.**[Citation Graph (0, 0)][DBLP] ISCAS (3), 2003, pp:196-199 [Conf] - Kiyotaka Yamamura, Naoya Igarashi, Yasuaki Inoue
**An interval algorithm for finding all solutions of nonlinear resistive circuits.**[Citation Graph (0, 0)][DBLP] ISCAS (3), 2003, pp:192-195 [Conf] - Yun Yang, Wenqing Zhao, Yasuaki Inoue
**High-performance systolic arrays for band matrix multiplication.**[Citation Graph (0, 0)][DBLP] ISCAS (2), 2005, pp:1130-1133 [Conf] - Akio Ushida, Yoshihiro Yamagami, Ikkei Kinouchi, Yoshifumi Nishio, Yasuaki Inoue
**An efficient algorithm for finding multiple DC solutions based on Spice oriented Newton homotopy method.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2001, pp:447-450 [Conf] - Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Chang Wei Fong, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
**Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills.**[Citation Graph (0, 0)][DBLP] ISQED, 2005, pp:586-591 [Conf] - Atsushi Kurokawa, Masaharu Yamamoto, Nobuto Ono, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
**Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture.**[Citation Graph (0, 0)][DBLP] ISQED, 2005, pp:153-158 [Conf] - Akio Ushida, Yoshihiro Yamagami, Yoshifumi Nishio, Ikkei Kinouchi, Yasuaki Inoue
**An efficient algorithm for finding multiple DC solutions based onthe SPICE-oriented Newton homotopy method.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:3, pp:337-348 [Journal] - Hong Yu, Y. Inoue, Y. Matsuya, Zhangcai Huang
**An effective pseudo-transient algorithm for finding DC operating points of nonlinear circuits.**[Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf] - Zhangcai Huang, Y. Inoue, Quan Zhang, Yuehu Zhou, Long Xie, H. Ogai
**Behavioral macromodeling of analog LSI implementation for automobile intake system.**[Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf] **Modeling the Overshooting Effect for CMOS Inverter in Nanometer Technologies.**[Citation Graph (, )][DBLP]**A Wide Dynamic Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback.**[Citation Graph (, )][DBLP]
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