The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

José E. Franca: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. João Pedro A. Carreira, José E. Franca
    High-Speed CMOS Current Comparators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:731-734 [Conf]
  2. José E. Franca, Sanjit K. Mitra, Antonio Petraglia
    Recent Developments and Future Trends of Multirate Analog-digital Systems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1042-1045 [Conf]
  3. João Goes, José E. Franca, Nuno F. Paulino, J. Grilo, Gabor C. Temes
    High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:345-348 [Conf]
  4. João Goes, João C. Vital, José E. Franca
    Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:525-528 [Conf]
  5. Jorge Guilherme, José E. Franca
    Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:377-380 [Conf]
  6. Jorge Guilherme, José E. Franca
    New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:529-532 [Conf]
  7. Bernardo G. Henriques, José E. Franca
    High-speed D/A Conversion with Linear Phase Sin x/x Compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1204-1207 [Conf]
  8. N. C. Horta, José E. Franca
    A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:371-374 [Conf]
  9. F. P. Martins, Nuno F. Paulino, José E. Franca
    Charge Programming Techniques for SC Biquads. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1160-1163 [Conf]
  10. F. C. Nunes, José E. Franca
    Continuous-time Leapfrog Filter with Precise Successive Approximation Tuning. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1271-1273 [Conf]
  11. Wang Ping, José E. Franca
    Switched-capacitor Polyphase Structures for Two-dimensional Analog FIR Filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1038-1041 [Conf]
  12. Wang Ping, José E. Franca
    Switched-Current Multirate Filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:321-324 [Conf]
  13. Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca
    Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:129-132 [Conf]
  14. João C. Vital, José E. Franca
    A Concurrent Two-step Flash Analogue-to-digital Converter Architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1196-1199 [Conf]
  15. João C. Vital, José E. Franca, Nuno S. Silva
    Fully-digital Testability of a High-speed Conversion System. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1595-1598 [Conf]
  16. Seng-Pan U., Rui Paulo Martins, José E. Franca
    High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:204-207 [Conf]
  17. Seng-Pan U., Rui Paulo Martins, José E. Franca
    A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:320-323 [Conf]
  18. Kong-Pang Pun, José E. Franca, C. Azeredo Leme
    A quadrature sampling scheme with improved image rejection for complex-IF receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:45-48 [Conf]
  19. Jorge Guilherme, Pedro M. Figueiredo, P. Azevedo, G. Minderico, A. Leal, João C. Vital, José E. Franca
    A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:396-399 [Conf]
  20. Seng-Pan U., Rui Paulo Martins, José E. Franca
    Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:57-60 [Conf]
  21. Seng-Pan U., Rui Paulo Martins, José E. Franca
    High performance multirate SC circuits with predictive correlated double sampling technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:77-80 [Conf]
  22. Seng-Pan U., Rui Paulo Martins, José E. Franca
    Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:441-444 [Conf]
  23. Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca
    A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:221-224 [Conf]
  24. João C. Vital, José E. Franca
    High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:357-362 [Conf]
  25. N. C. Horta, José E. Franca
    Algorithm-driven synthesis of data conversion architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:10, pp:1116-1135 [Journal]

Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002