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## Search the dblp DataBase
Chung-Yu Wu:
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## Publications of Author- Ying-Hwi Chang, Chung-Yu Wu, Tsai-Chung Yu
**Chopper-stabilized Sigma-delta Modulator.**[Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:1286-1289 [Conf] - Chih-Cheng Chen, Chung-Yu Wu, Jyh-Jer Cho
**A 1.5 V CMOS Current-Mode Cyclic Analog-to-Digital Converter with Digital Error Correction.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:537-540 [Conf] - Shu-Yuan Chin, Chung-Yu Wu
**A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter.**[Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:1200-1203 [Conf] - Shu-Yuan Chin, Chung-Yu Wu
**An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:325-328 [Conf] - Hong-Yi Huang, Chung-Yu Wu
**Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications.**[Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:1905-1908 [Conf] - Hong-Yi Huang, Chung-Yu Wu
**New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:15-18 [Conf] - Hong-Yi Huang, Jinn-Shyan Wang, Yuan-Hua Chu, Tain-Shun Wu, Kuo-Hsing Cheng, Chung-Yu Wu
**Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1572-1575 [Conf] - Ming-Dou Ker, Chung-Yu Wu, Hun-Hsien Chang, Tao Cheng, Tain-Shun Wu
**Complementary-LVTSCR ESD Protection Scheme for Submicron CMOS IC's.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:833-836 [Conf] - Jeng-Feng Lan, Chung-Yu Wu
**CMOS Current-Mode Outstar Neural Networks with Long-Period Analog Ratio Memory.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1676-1679 [Conf] - Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai
**VHF/UHF High-Q Bandpass Tunable Filters Design Using CMOS Inverter-Based Transresistnace Amplifiers.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:649-652 [Conf] - Liang-Hung Lu, Chung-Yu Wu
**The Design of the CMOS Current-Mode General-Purpose Analog Processor.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:549-552 [Conf] - Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai
**VHF Bandpass Filter Design Using CMOS Transresistance Amplifiers.**[Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:990-993 [Conf] - Chung-Yu Wu, Heng-Shou Hsu
**The Continuous-Time VHF Lowpass Filter Design Using Finite-Gain Current and Voltage Amplifiers and Special Q-Enhancement Circuit.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:771-774 [Conf] - Chung-Yu Wu, Heng-Shou Hsu
**The Design of New Low-Voltage CMOS VHF Continuous-Time Lowpass Biquaud Filters.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:295-298 [Conf] - Chung-Yu Wu, Chi-Yao Yu
**A 0.8 V 5.9 GHz wide tuning range CMOS VCO using inversion-mode bandswitching varactors.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2005, pp:5079-5082 [Conf] - Yu-Chuan Shih, Chung-Yu Wu
**An optimized CMOS pseudo-active-pixel-sensor structure for low-dark-current imager applications.**[Citation Graph (0, 0)][DBLP] ISCAS (1), 2003, pp:809-812 [Conf] - Yuh-Kuang Tseng, Kuo-Hsing Cheng, Chung-Yu Wu
**Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit.**[Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:23-26 [Conf] - Chung-Yu Wu, Felice Cheng, Cheng-Ta Chiang, Po-Kang Lin
**A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prostheses.**[Citation Graph (0, 0)][DBLP] ISCAS (4), 2004, pp:37-40 [Conf] - Chung-Yu Wu, Shuo-Yuan Hsiao, Ron-Yi Liu
**A 3-V 1-GHz Low-Noise Bandpass Amplifier.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1964-1967 [Conf] - Chung-Yu Wu, Jr-Houng Lu, Kuo-Hsing Cheng
**A New CMOS Current-Sensing Complementary Pass-Transistor Logic (CSCPTL) for High-Speed Low-Voltage Applications.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:25-28 [Conf] - Chung-Yu Wu, Wei-Shinn Wey, Tsai-Chung Yu
**A 1.5V CMOS Balanced Differential Switched-Capacitor Filter with Internal Clock Boosters.**[Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1025-1028 [Conf] - Chung-Yu Wu, Chung-Yun Chou
**The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variations.**[Citation Graph (0, 0)][DBLP] ISCAS (1), 2001, pp:121-124 [Conf] - Chung-Yu Wu, Yu-Yee Liow
**A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs.**[Citation Graph (0, 0)][DBLP] ISCAS (1), 1999, pp:47-50 [Conf] - Yu-Chuan Shih, Chung-Yu Wu
**The design of high-performance 128×128 CMOS image sensors using new current-readout techniques.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 1999, pp:168-171 [Conf] - Wen-Cheng Yen, Chung-Yu Wu
**A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration level.**[Citation Graph (0, 0)][DBLP] ISCAS (6), 1999, pp:505-508 [Conf] - Chung-Yu Wu, Jui-Lin Lai
**Improvement of pattern learning and recognition capability in ratio-memory cellular neural networks with non-discrete-type Hebbian learning algorithm.**[Citation Graph (0, 0)][DBLP] ISCAS (1), 2002, pp:629-632 [Conf] - Yu-Yee Liow, Chung-Yu Wu
**The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques.**[Citation Graph (0, 0)][DBLP] ISCAS (3), 2002, pp:117-120 [Conf] - Chung-Yu Wu, Jen-Sheng Hwang, Chih Chang, Ching-Chu Chang
**An Efficient Timing Model for CMOS Combinational Logic Gates.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:636-650 [Journal] - Chung-Yu Wu, Ming-Chuen Shiau
**Efficient physical timing models for CMOS AND-OR-inverter and OR-AND-inverter gates and their applications.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:9, pp:1002-1009 [Journal] - Chung-Yu Wu, Chien-Ta Huang
**A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications.**[Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:3087-3090 [Conf] - Chung-Yu Wu, Shun-Wei Hsu, Wen-Chieh Wang
**A 24-GHz CMOS Current-Mode Power Amplifier with High PAE and Output Power.**[Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:2866-2869 [Conf] - Chung-Yu Wu, Hsin-Chin Jiang
**An improved BJT-based silicon retina with tunable image smoothing capability.**[Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1999, v:7, n:2, pp:241-248 [Journal] - Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang
**Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC.**[Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:307-321 [Journal] **An efficient Compensation Method for Improving Luminance Uniformity of Organic Light Emitting Diode Panels.**[Citation Graph (, )][DBLP]**The design of integrated 3-GHz to 11-GHz CMOS transmitter for full-band ultra-wideband (UWB) applications.**[Citation Graph (, )][DBLP]**A new high-performance CMOS GHz power amplifier design with common-mode signal cancellation technique.**[Citation Graph (, )][DBLP]**The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications.**[Citation Graph (, )][DBLP]**An improved low-power CMOS direct-conversion transmitter for GHz wireless communication applications.**[Citation Graph (, )][DBLP]
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