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Chong S. Rim: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yhonkyong Choi, Juhyun Lee, Chong S. Rim
    Automatic Functional Cell Generation in the Sea-of-Gates Layout Style. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:189-192 [Conf]
  2. Yanghoon Kim, Chong S. Rim, Byoungki Min
    A Block Matching Algorithm with 16: 1 Subsampling and Its Hardware Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:613-616 [Conf]
  3. Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
    A simple and effective greedy multilayer router for MCMs. [Citation Graph (0, 0)][DBLP]
    ISPD, 1997, pp:67-72 [Conf]
  4. Jagannathan Narasimhan, Kazuo Nakajima, Chong S. Rim
    A Graph Theoretical Approach for the Yield Enhancement of Reconfigurable VLSI/WSI Arrays. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 1999, v:90, n:1-3, pp:195-221 [Journal]
  5. Ruey-Der Lou, Majid Sarrafzadeh, Chong S. Rim, Kazuo Nakajima, Sumio Masuda
    General Circular Permutation Layout. [Citation Graph (0, 0)][DBLP]
    Mathematical Systems Theory, 1992, v:25, n:4, pp:269-292 [Journal]
  6. Hyeong-Ah Choi, Kazuo Nakajima, Chong S. Rim
    Graph Bipartization and via Minimization. [Citation Graph (0, 0)][DBLP]
    SIAM J. Discrete Math., 1989, v:2, n:1, pp:38-47 [Journal]
  7. Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
    SEGRA: a very fast general area router for multichip modules. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:5, pp:659-665 [Journal]
  8. J. Narasimham, Kazuo Nakajima, Chong S. Rim, Anton T. Dahbura
    Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:8, pp:976-986 [Journal]
  9. Chong S. Rim, Toshinobu Kashiwabara, Kazuo Nakajima
    Exact algorithms for multilayer topological via minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:11, pp:1165-1173 [Journal]

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