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Randall L. Geiger :
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Degang Chen , Zhongjun Yu , Randall L. Geiger An adaptive, truly background calibration method for high speed pipeline ADC design. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 2005, pp:6190-6193 [Conf ] Xin Dai , Degang Chen , Randall L. Geiger A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCs. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4831-4834 [Conf ] Xin Dai , Chengming He , Hanqing Xing , Degang Chen , Randall L. Geiger An N/sup th/ order central symmetrical layout pattern for nonlinear gradients cancellation. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4835-4838 [Conf ] Haibo Fei , Randall L. Geiger , Degang Chen Optimum area allocation for resistors and capacitors in continuous-time monolithic filters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:865-868 [Conf ] Chengming He , Degang Chen , Randall L. Geiger A low-voltage compatible two-stage amplifier with /spl ges/120 dB gain in standard digital CMOS. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:353-356 [Conf ] Chengming He , Le Jin , Degang Chen , Randall L. Geiger Robust design of high gain amplifiers using dynamical systems and bifurcation theory. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:481-484 [Conf ] Chengming He , Kuangming Yap , Degang Chen , Randall L. Geiger NTH order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradient. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:237-240 [Conf ] Hanjun Jiang , Degang Chen , Randall L. Geiger Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4285-4288 [Conf ] Hanjun Jiang , Haibo Fei , Degang Chen , Randall L. Geiger A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:61-64 [Conf ] Le Jin , Degang Chen , Randall L. Geiger A digital self-calibration algorithm for ADCs based on histogram test using low-linearity input signals. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2005, pp:1378-1381 [Conf ] Le Jin , Chengming He , Degang Chen , Randall L. Geiger An SoC compatible linearity test approach for precision ADCs using easy-to-generate sinusoidal stimuli. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:928-931 [Conf ] Le Jin , Chengming He , Degang Chen , Randall L. Geiger Fast implementation of a linearity test approach for high-resolution ADCs using non-linear ramp signals. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:932-935 [Conf ] Joon-Yub Kim , Randall L. Geiger MOS Active Attenuators for Analog ICs and their Applications to FInite Gain Amplifiers. [Citation Graph (0, 0)][DBLP ] ISCAS, 1994, pp:701-704 [Conf ] Yu Lin , Vipul Katyal , Randall L. Geiger Power dependence of feedback amplifiers on opamp architecture. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2005, pp:1618-1621 [Conf ] Yu Lin , Vipul Katyal , Mark Schlarmann , Randall L. Geiger kT/C constrained optimization of power in pipeline ADCs. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2005, pp:1968-1971 [Conf ] Beatriz Olleta , Lance Juffer , Degang Chen , Randall L. Geiger A deterministic dynamic element matching approach to ADC testing. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:533-536 [Conf ] Beatriz Olleta , Hanjun Jiang , Degang Chen , Randall L. Geiger Testing high resolution ADCs using deterministic dynamic element matching. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:920-923 [Conf ] Beatriz Olleta , Hanjun Jiang , Degang Chen , Randall L. Geiger Parameter optimization of deterministic dynamic element matching DACs for accurate and cost-effective ADC testing. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:924-927 [Conf ] Beatriz Olleta , Hanjun Jiang , Degang Chen , Randall L. Geiger A segmented thermometer coded DAC with deterministic dynamic element matching for high resolution ADC test. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2005, pp:784-787 [Conf ] Kumar L. Parthasarathy , Le Jin , Turker Kuyel , Dana Price , Degang Chen , Randall L. Geiger Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:537-540 [Conf ] George R. Spalding , Randall L. Geiger Digital correction for improved spectral response in signal generation systems. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:132-135 [Conf ] Chao Su , Sreenath Thoka , Kee-Chee Tiew , Randall L. Geiger A 40 GHz modified-Colpitts voltage controlled oscillator with increased tuning range. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:717-720 [Conf ] Sreenath Thoka , Randall L. Geiger Fast-switching adaptive bandwidth frequency synthesizer using a loop filter with switched zero-resistor array. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 2005, pp:5373-5376 [Conf ] Kee-Chee Tiew , J. Cusey , Randall L. Geiger Inflection point correction for voltage references. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:649-652 [Conf ] Hanqing Xing , Degang Chen , Randall L. Geiger A two-step DDEM ADC for accurate and cost-effective DAC testing. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2005, pp:4289-4292 [Conf ] Zhongjun Yu , Degang Chen , Randall L. Geiger 1-D and 2-D switching strategies achieving near optimal INL for thermometer-coded current steering DACs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:909-912 [Conf ] Zhongjun Yu , Degang Chen , Randall L. Geiger The SRE/SRM approach for spectral testing of AMS circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:249-252 [Conf ] Zhongjun Yu , Degang Chen , Randall L. Geiger Accurate testing of ADC's spectral performance using imprecise sinusoidal excitations. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2004, pp:645-648 [Conf ] Zhongjun Yu , Degang Chen , Randall L. Geiger , Ioannis Papantonopoulos Pipeline ADC linearity testing with dramatically reduced data capture time. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2005, pp:792-795 [Conf ] Chong-Gun Yu , Randall L. Geiger Very Low Voltage Operational Amplifiers Using Floating Gate MOS Transistor. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1152-1155 [Conf ] Chong-Gun Yu , Randall L. Geiger An Accurate and Matching-Free Threshold Voltage Extraction Scheme for MOS Transistors. [Citation Graph (0, 0)][DBLP ] ISCAS, 1994, pp:115-118 [Conf ] Jie Yan , Randall L. Geiger Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancement. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:228-231 [Conf ] M. M. Amourah , Randall L. Geiger Gain and bandwidth boosting techniques for high-speed operational amplifiers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:232-235 [Conf ] Mao-Feng Lan , Randall L. Geiger MOSGRAD-a tool for simulating the effects of systematic and random channel parameter variations. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:89-92 [Conf ] Yonghui Tang , Randall L. Geiger A 2.5 Gbit/s CMOS PLL for data/clock recovery without frequency divider. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:256-259 [Conf ] Mao-Feng Lan , Randall L. Geiger Modeling of random channel parameter variations in MOS transistors. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:85-88 [Conf ] Huiting Chen , F. Whiteside , Randall L. Geiger Current mirror circuit with accurate mirror gain for low beta transistors. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:536-539 [Conf ] Mark Schlarmann , Randall L. Geiger Prototype implementation of a WWW based analog circuit design tool. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:97-100 [Conf ] M. M. Amourah , Randall L. Geiger A high gain strategy with positive-feedback gain enhancement technique. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:631-634 [Conf ] L. Wu , H. Chen , S. Nagavarapu , R. Geiger , E. Lee , W. Black A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 1999, pp:565-568 [Conf ] M. E. Schlarmann , E. K. F. Lee , Randall L. Geiger A new multipath amplifier design technique for enhancing gain without sacrificing bandwidth. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 1999, pp:610-615 [Conf ] H. Chen , E. Lee , R. Geiger A 2 GHz VCO with process and temperature compensation. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 1999, pp:569-572 [Conf ] S. Nagavarapu , J. Yan , E. K. F. Lee , Randall L. Geiger An asynchronous data recovery/retransmission technique with foreground DLL calibration. [Citation Graph (0, 0)][DBLP ] ISCAS (6), 1999, pp:354-357 [Conf ] M. M. Amourah , Randall L. Geiger All digital transistor high gain operational amplifier using positive feedback technique. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:701-704 [Conf ] Yonghui Tang , Randall L. Geiger Transient bit error rate analysis of data recovery systems using jitter models. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2002, pp:185-188 [Conf ] Yonghua Cong , Randall L. Geiger Formulation of INL and DNL yield estimation in current-steering D/A converters. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2002, pp:149-152 [Conf ] Kee-Chee Tiew , J. Cusey , Randall L. Geiger A curvature compensation technique for bandgap voltage references using adaptive reference temperature. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2002, pp:265-268 [Conf ] Yu Lin , Randall L. Geiger Resistors layout for enhancing yield of R-2R DACs. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2002, pp:97-100 [Conf ] Hanjun Jiang , Beatriz Olleta , Degang Chen , Randall L. Geiger Testing High Resolution ADCs with Low Resolution/Accuracy Deterministic Dynamic Element Matched DACs. [Citation Graph (0, 0)][DBLP ] ITC, 2004, pp:1379-1388 [Conf ] Le Jin , Kumar Parthasarathy , Turker Kuyel , Degang Chen , Randall L. Geiger Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs. [Citation Graph (0, 0)][DBLP ] ITC, 2003, pp:218-227 [Conf ] Zhongjun Yu , Degang Chen , Randall L. Geiger A Computationally Efficient Method for Accurate Spectral Testing without Requiring Coherent Sampling. [Citation Graph (0, 0)][DBLP ] ITC, 2004, pp:1398-1407 [Conf ] Le Jin , Degang Chen , Randall L. Geiger Code-Density Test of Analog-to-Digital Converters Using Single Low-Linearity Stimulus Signal. [Citation Graph (0, 0)][DBLP ] VTS, 2007, pp:303-310 [Conf ] Kumar Parthasarathy , Turker Kuyel , Dana Price , Le Jin , Degang Chen , Randall L. Geiger BIST and production testing of ADCs using imprecise stimulus. [Citation Graph (0, 0)][DBLP ] ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:4, pp:522-545 [Journal ] Hanjun Jiang , Degang Chen , Randall L. Geiger Deterministic DEM DAC Performance Analysis. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:3860-3863 [Conf ] Haibo Fei , Randall L. Geiger Linear Current Division Principles. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:2830-2833 [Conf ] Hanqing Xing , Le Jin , Degang Chen , Randall L. Geiger Characterization of a current-mode bandgap circuit structure for high-precision reference applications. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Chao Su , Randall L. Geiger Dynamic calibration of current-steering DAC. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Xin Dai , Degang Chen , Randall L. Geiger Explicit characterization of bandgap references. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] K. Wada , Randall L. Geiger Minimization of total area in integrated active RC filters. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Le Jin , Hanqing Xing , Degang Chen , R. Geiger A self-calibrated bandgap voltage reference with 0.5 ppm/°C temperature coefficient. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Hanqing Xing , Degang Chen , R. Geiger Linearity test for high resolution DACs using low-accuracy DDEM flash ADCs. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Yu Lin , R. Geiger Unit resistor characterization for matching-critical circuit design. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] A test strategy for time-to-digital converters using dynamic element matching and dithering. [Citation Graph (, )][DBLP ] System identification -based reduced-code testing for pipeline ADCs' linearity test. [Citation Graph (, )][DBLP ] Adjustable hysteresis CMOS Schmitt triggers. [Citation Graph (, )][DBLP ] A simple and accurate method to predict offset voltage in dynamic comparators. [Citation Graph (, )][DBLP ] A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs. [Citation Graph (, )][DBLP ] On-chip at-speed linearity testing of high-resolution high-speed DACs using DDEM ADCs with dithering. [Citation Graph (, )][DBLP ] An inexpensive microelectronic environmental test chamber. [Citation Graph (, )][DBLP ] Search in 0.004secs, Finished in 0.460secs