The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

João Goes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. G. Evans, João Goes, Adolfo Steiger-Garção, Manuel Duarte Ortigueira, Nuno F. Paulino, Jilseph Lopes Silva
    Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:145-148 [Conf]
  2. João Goes, José E. Franca, Nuno F. Paulino, J. Grilo, Gabor C. Temes
    High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:345-348 [Conf]
  3. João Goes, Nuno F. Paulino, G. Evans
    On-chip built-in self-test of video-rate ADCs using Gaussian noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:796-799 [Conf]
  4. João Goes, João C. Vital, José E. Franca
    Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:525-528 [Conf]
  5. Nuno F. Paulino, M. Serrazina, João Goes, Adolfo Steiger-Garção
    Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:133-136 [Conf]
  6. Romero Tavares, B. Vaz, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção
    Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:197-200 [Conf]
  7. M. Unterweissacher, João Goes, Nuno F. Paulino, G. Evans, Manuel Duarte Ortigueira
    Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:877-880 [Conf]
  8. Nuno F. Paulino, João Goes, Adolfo Steiger-Garção
    Design methodology for optimization of analog building blocks using genetic algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:435-438 [Conf]
  9. B. Vaz, Nuno F. Paulino, João Goes, R. Costa, Romero Tavares, Adolfo Steiger-Garção
    Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:921-924 [Conf]
  10. Pedro Amaral, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção
    An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:141-144 [Conf]
  11. J. P. Oliveira, J. Goes, B. Esperanca, N. Paulino, J. Fernandes
    Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3602-3605 [Conf]
  12. A. Galhardo, J. Goes, N. Paulino
    Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  13. G. Evans, João Goes, Nuno F. Paulino
    Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:2, pp:308-316 [Journal]

  14. A CMOS Inverter-Based Self-biased Fully Differential Amplifier. [Citation Graph (, )][DBLP]


  15. Switched-capacitor circuits using a single-phase scheme. [Citation Graph (, )][DBLP]


  16. A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing. [Citation Graph (, )][DBLP]


  17. New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise. [Citation Graph (, )][DBLP]


  18. Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC. [Citation Graph (, )][DBLP]


  19. Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback. [Citation Graph (, )][DBLP]


  20. Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm. [Citation Graph (, )][DBLP]


  21. A CMOS variable width short-pulse generator circuit for UWB RADAR applications. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002