The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Jieh-Tsorng Wu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jen-Lin Fan, Jieh-Tsorng Wu
    A robust background calibration technique for switched-capacitor pipelined ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1374-1377 [Conf]
  2. Chun-Cheng Huang, Jieh-Tsorng Wu
    A statistical background calibration technique for flash analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:125-128 [Conf]
  3. Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu
    A digital background calibration technique for pipelined analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:881-884 [Conf]
  4. Cheng-Chung Hsu, Jieh-Tsorng Wu
    Highly linear 100 MHz CMOS programmable gain amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:647-650 [Conf]
  5. Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang
    Multi-level memory systems using error control codes. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:393-396 [Conf]

Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002