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Maurits Ortmanns: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
    A 1 V, 12-bit wideband continuous-time /spl Sigma//spl Delta/ modulator for UMTS applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:921-924 [Conf]
  2. Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
    Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:1076-1079 [Conf]
  3. Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
    A new technique for automatic error correction in Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2539-2542 [Conf]
  4. Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
    Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speed. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2543-2546 [Conf]
  5. Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
    Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:925-928 [Conf]
  6. Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
    Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:1037-1040 [Conf]
  7. Maurits Ortmanns, Markus Kuderer, Yiannos Manoli, Friedel Gerfers
    A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:405-408 [Conf]
  8. Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
    On the synthesis of cascaded continuous-time Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:419-422 [Conf]
  9. Lourans Samid, Maurits Ortmanns, Yiannos Manoli, Friedel Gerfers
    A new kind of low-power multibit third order continuous-time lowpass Sigma-Delta modulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:293-296 [Conf]
  10. Maurits Ortmanns, Lourans Samid, Yiannos Manoli, Friedel Gerfers
    Multirate cascaded continuous time Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:225-228 [Conf]
  11. Friedel Gerfers, Kian Min Soh, Maurits Ortmanns, Yiannos Manoli
    Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:233-236 [Conf]
  12. Maurits Ortmanns
    Charge Balancing in Functional Electrical Stimulators: A Comparative Study. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:573-576 [Conf]
  13. Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli
    A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:241-244 [Conf]
  14. Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli
    On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:721-724 [Conf]
  15. Alexander Buhmann, Matthias Keller, Maurits Ortmanns, Yiannos Manoli
    Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2264-2267 [Conf]
  16. Fabian Henrici, Joachim Becker, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli
    A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2236-2239 [Conf]
  17. C. Peters, O. Kessling, Fabian Henrici, Maurits Ortmanns, Yiannos Manoli
    CMOS Integrated Highly Efficient Full Wave Rectifier. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2415-2418 [Conf]
  18. Friedel Gerfers, Maurits Ortmanns, P. Schmitz
    A transistor-based clock jitter insensitive DAC architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  19. Maurits Ortmanns, N. Unger, A. Rocke, M. Gehrke, H. J. Tiedtke
    A retina stimulator ASIC with 232 electrodes, custom ESD protection and active charge balancing. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  20. A Study on self-timed asynchronous subthreshold logic. [Citation Graph (, )][DBLP]


  21. A new optimization approach for the automatic design of SigmaDelta-modulators. [Citation Graph (, )][DBLP]


  22. A hexagonal Field Programmable Analog Array consisting of 55 digitally tunable OTAs. [Citation Graph (, )][DBLP]


  23. Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators. [Citation Graph (, )][DBLP]


  24. High-bandwidth floating gate CMOS rectifiers with reduced voltage drop. [Citation Graph (, )][DBLP]


  25. Variability of flip-flop timing at sub-threshold voltages. [Citation Graph (, )][DBLP]


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