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Jia-Wei Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jiun-In Guo, Jia-Wei Chen, Han-Chen Chen
    A new 2-D 8/spl times/8 DCT/IDT core design using group distributed arithmetic. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:752-755 [Conf]
  2. Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen
    A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:769-772 [Conf]
  3. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Jia-Wei Chen
    An Energy-Aware IP Core Design for the Variable-Length DCT/IDCT Targeting at MPEG4 Shape-Adaptive Transforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:5, pp:704-715 [Journal]
  4. Jiun-In Guo, Rei-Chin Ju, Jia-Wei Chen
    An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2004, v:14, n:4, pp:416-428 [Journal]
  5. Jia-Wei Chen, Kuan-Hung Chen, Jinn-Shyan Wang, Jiun-In Guo
    A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  6. A dynamic quality-scalable H.264 video encoder chip. [Citation Graph (, )][DBLP]

  7. A Condition-based Intra Prediction Algorithm for H.264/AVC. [Citation Graph (, )][DBLP]

  8. A Quality Scalable H.264/AVC Baseline Intra Encoder for High Definition Video Applicaitons. [Citation Graph (, )][DBLP]

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