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Shuenn-Yuh Lee: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ming-Feng Huang, Shuenn-Yuh Lee, Chung J. Kuo
    A 5.25 GHz CMOS even harmonic mixer with an enhancing inductance. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2116-2119 [Conf]
  2. Shuenn-Yuh Lee, Chung-Han Cheng, Ming-Feng Huang, Shyh-Chyang Lee
    A 1-V 2.4-GHz low-power fractional-N frequency synthesizer with sigma-delta modulator controller. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2811-2814 [Conf]
  3. Shuenn-Yuh Lee, Shyh-Chyang Lee, Jia-Jin Jason Chen
    VLSI implementation of wireless bi-directional communication circuits for micro-stimulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:57-60 [Conf]
  4. Shuenn-Yuh Lee, Yueh-Lun Tsai, Wei-Zen Su, Po-Hui Yang
    A 2.5 V switched-current sigma-delta modulator with a novel class AB memory cell. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:613-616 [Conf]
  5. Ming-Feng Huang, Shuenn-Yuh Lee, Chung J. Kuo
    A CMOS even harmonic mixer with current reuse for low power applications. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:290-295 [Conf]
  6. Chih-Jen Cheng, Shuenn-Yuh Lee
    A low-voltage adaptive switched-current SDM for bio-acquisition microsystems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  7. Shuenn-Yuh Lee, Chia-Chyang Chen, Shyh-Chyang Lee, Chih-Jen Cheng
    A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  8. Shuenn-Yuh Lee, Chia-Chyang Chen
    VLSI implementation of programmable FFT architectures for OFDM communication system. [Citation Graph (0, 0)][DBLP]
    IWCMC, 2006, pp:893-898 [Conf]

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