The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Valery Axelrad: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, R. Dlugosz, A. Dabrowski
    3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1154-1157 [Conf]
  2. Valery Axelrad, Nicolas B. Cobb, M. O'Brien, Thuy Do, Tom Donnelly, Yuri Granik, Emile Y. Sahouria, Victor Boksha, Artur Balasinski
    Efficient Full-Chip Yield Analysis Methodology for OPC-Corrected VLSI Designs. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:461-466 [Conf]
  3. Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Marek Syrzycki
    Design Strategies for ESD Protection in SOC. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2004, pp:210-214 [Conf]
  4. Valery Axelrad
    Fourier method modeling of semiconductor devices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:11, pp:1225-1237 [Journal]
  5. Valery Axelrad
    Grid quality and its influence on accuracy and convergence in device simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:2, pp:149-157 [Journal]
  6. Oleg Semenov, H. Sarbishaei, Valery Axelrad, Manoj Sachdev
    Novel gate and substrate triggering techniques for deep sub-micron ESD protection devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2006, v:37, n:6, pp:526-533 [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002