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Manh Anh Do: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do
    A novel methodology for the design of LC tank VCO with low phase noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:376-379 [Conf]
  2. Wei Meng Lim, Han Guo Ma, Manh Anh Do, Kiat Seng Yeo
    A 5GHz to 6GHz integrated differential LNA. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:4815-4818 [Conf]
  3. X. P. Yu, Manh Anh Do, Jianguo Ma, Kiat Seng Yeo
    A new 5 GHz CMOS dual-modulus prescaler. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:5027-5030 [Conf]
  4. Beng Hwee Ong, Choon Beng Sia, Kiat Seng Yeo, Jianguo Ma, Manh Anh Do, Erping Li
    Investigating the frequency dependence elements of CMOS RFIC interconnects for physical modeling. [Citation Graph (0, 0)][DBLP]
    SLIP, 2004, pp:31-38 [Conf]
  5. Xiaomeng Shi, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do, Erping Li
    Equivalent circuit model of on-wafer CMOS interconnects for RFICs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:9, pp:1060-1071 [Journal]
  6. X. P. Yu, Manh Anh Do, Lin Jia, Jianguo Ma, Kiat Seng Yeo
    Design of a low power wide-band high resolution programmable frequency divider. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:9, pp:1098-1103 [Journal]
  7. Xiaopeng Yu, Manh Anh Do, Jianguo Ma, Kiat Seng Yeo
    A New Phase Noise Model for TSPC based divider. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:348-351 [Conf]
  8. Shan Jiang, Manh Anh Do, Kiat Seng Yeo
    A 200-MHz CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:352-356 [Conf]

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