|
Search the dblp DataBase
Bart Keppens:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Markus P. J. Mergens, Geert Wybo, Bart Keppens, Benjamin Van Camp, Frederic De Ranter, Koen G. Verhaege, John Armer, Phillip Jozwiak, Christian C. Russ
ESD protection circuit design for ultra-sensitive IO applications in advanced sub-90nm CMOS technologies. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2005, pp:1194-1197 [Conf]
- K. Bock, Bart Keppens, V. De Heyn, Guido Groeseneken, L. Y. Ching, A. Naem
Influence of gate length on ESD-performance for deep submicron CMOS technology. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2001, v:41, n:3, pp:375-383 [Journal]
- Bart Keppens, V. De Heyn, M. Natarajan Iyer, Vesselin K. Vassilev, Guido Groeseneken
Significance of the failure criterion on transmission line pulse testing. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2002, v:42, n:6, pp:901-907 [Journal]
- S. Trinh, Markus P. J. Mergens, Koen G. Verhaege, Christian C. Russ, John Armer, Phillip Jozwiak, Bart Keppens, Russ Mohn, G. Taylor, Frederic De Ranter
Multi-finger turn-on circuits and design techniques for enhanced ESD performance and width scaling. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2003, v:43, n:9-11, pp:1537-1543 [Journal]
- Bart Keppens, Markus P. J. Mergens, Cong Son Trinh, Christian C. Russ, Benjamin Van Camp, Koen G. Verhaege
ESD protection solutions for high voltage technologies. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2006, v:46, n:5-6, pp:677-688 [Journal]
Search in 0.001secs, Finished in 0.001secs
|