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Tadashi Shibata: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata
    Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:425-428 [Conf]
  2. Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata
    A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5365-5368 [Conf]
  3. Benjamas Tongprasit, Kiyoto Ito, Tadashi Shibata
    A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2389-2392 [Conf]
  4. Masayuki Umejima, Toshihiko Yamasaki, Tadashi Shibata
    A bump-circuit-based motion detector using projected-activity histograms. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:749-752 [Conf]
  5. Keng Hoong Wee, Toshiyuki Nozawa, T. Yonezawa, Y. Yamashita, Tadashi Shibata, Tadahiro Ohmi
    High-precision analog EEPROM with real-time write monitoring. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:105-108 [Conf]
  6. T. Yamasaki, A. Suzuki, D. Kobayashi, T. Shibata
    A fast self-convergent flash-memory programming scheme for MV and analog data storage. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:930-933 [Conf]
  7. T. Yamasaki, T. Shibata
    An analog similarity evaluation circuit featuring variable functional forms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2001, pp:561-564 [Conf]
  8. A. Okada, T. Shibata
    A neuron-MOS parallel associator for high-speed CDMA matched filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:392-395 [Conf]
  9. Hideo Yamasaki, Tadashi Shibata
    A real-time VLSI median filter employing two-dimensional bit-propagating architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:349-352 [Conf]
  10. H. Kimura, T. Shibata
    A motion-based analog VLSI saliency detector using quasi-two-dimensional hardware algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:333-336 [Conf]
  11. Keng Hoong Wee, T. Yonezawa, Toshiyuki Nozawa, Tadashi Shibata, Tadahiro Ohmi
    A zone-programmed EEPROM with real-time write monitoring for analog data storage. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:655-658 [Conf]
  12. M. Yagi, T. Shibata
    An associative-processor-based mixed signal system for robust grayscale image recognition. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:137-140 [Conf]
  13. T. Yamasaki, T. Taguchi, T. Shibata
    Low-power CDMA analog matched filters based on floating-gate technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:625-628 [Conf]
  14. Tadashi Shibata
    Functional-Device-Based VLSI for Intelligent Electronic Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1998, pp:317-0 [Conf]
  15. Yusuke Nakashita, Yoshio Mita, Tadashi Shibata
    An Analog Visual Pre-Processing Processor. [Citation Graph (0, 0)][DBLP]
    NIPS, 2005, pp:- [Conf]
  16. Tadashi Shibata, Koji Kotani, Takeo Yamashita, Hiroshi Ishii, Hideo Kosaka, Tadahiro Ohmi
    Implementing Intelligence on Silicon Using Neuron-Like Functional MOS Transistors. [Citation Graph (0, 0)][DBLP]
    NIPS, 1993, pp:919-926 [Conf]
  17. Tadashi Shibata, Tsutomu Nakai, Tatsuo Morimoto, Ryu Kaihara, Takeo Yamashita, Tadahiro Ohmi
    Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing. [Citation Graph (0, 0)][DBLP]
    NIPS, 1995, pp:685-691 [Conf]
  18. Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata
    A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors. [Citation Graph (0, 0)][DBLP]
    NIPS, 2003, pp:- [Conf]
  19. Toshihiko Yamasaki, Tadashi Shibata
    Analog Soft-Pattern-Matching Classifier using Floating-Gate MOS Technology. [Citation Graph (0, 0)][DBLP]
    NIPS, 2001, pp:1131-1138 [Conf]
  20. Huaiyu Xu, Yoshio Mita, Tadashi Shibata
    Intelligent Internet Search Applications Based on VLSI Associative Processors. [Citation Graph (0, 0)][DBLP]
    SAINT, 2002, pp:230-237 [Conf]
  21. Masakazu Yagi, Tadashi Shibata, Chihiro Tanikawa, Kenji Takada
    A Robust Medical Image Recognition System Employing Edge-Based Feature Vector Representation. [Citation Graph (0, 0)][DBLP]
    SCIA, 2003, pp:534-540 [Conf]
  22. Tadahiro Ohmi, Tadashi Shibata, Koji Kotani, Tsutomu Nakai, Akira Nakada, Ning Mei Yu, Masahiro Konda, Tatsuo Morimoto, Yuichiro Yamashita
    Association hardware for intelligent electronic systems. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:12, pp:52-62 [Journal]
  23. K. Ito, T. Shibata
    A time-domain gradient-detection architecture for VLSI analog motion sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  24. Benjamas Tongprasit, Tadashi Shibata
    Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  25. A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques. [Citation Graph (, )][DBLP]


  26. A Non-subtraction Configuration of Self-similitude Architecture for Multiple-Resolution Edge-Filtering CMOS Image Sensor. [Citation Graph (, )][DBLP]


  27. Normalized scoring of Hidden Markov Models by on-line learning and its application to gesture-sequence perception. [Citation Graph (, )][DBLP]


  28. An analog self-similitude edge-filtering processor for multiple-resolution image perception. [Citation Graph (, )][DBLP]


  29. Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception. [Citation Graph (, )][DBLP]


  30. Right brain computing hardware: a psychological brain model on silicon. [Citation Graph (, )][DBLP]


  31. Neuron-MOS continuous-time winner-take-all circuit for intelligent data processing. [Citation Graph (, )][DBLP]


  32. Blind image compression history determination using dynamic thresholding. [Citation Graph (, )][DBLP]


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