Search the dblp DataBase

Publications of Author

1. Ari Paasio, Mika Laiho, Asko Kananen, Kari Halonen, Jonne Poikonen
   A 32×32 cellular test chip targeting new functionalities. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2003, pp:506-509 [Conf]
   
2. Mikko Pänkäälä, Jonne Poikonen, Laura Vesalainen, Ari Paasio
   Realization of an analog current-mode 2D DCT. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2004, pp:745-748 [Conf]
   
3. Jonne Poikonen, Ari Paasio
   An area-efficient full-wave current rectifier for analog array processing. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:757-760 [Conf]
   
4. Jonne Poikonen, Ari Paasio
   Rank identification for an analog ranked order filter. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2819-2822 [Conf]
   
5. Laura Vesalainen, Jonne Poikonen, Mikko Pänkäälä, Ari Paasio
   A gray-code current-mode ADC for mixed-mode cellular computer. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2004, pp:81-84 [Conf]
   
6. Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio
   A 12-bit Current-Steering DAC with Calibration by Combination Selection. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:1469-1472 [Conf]
   
7. Janne Maunu, Mikko Pänkäälä, J. Marku, Jonne Poikonen, Mika Laiho, Ari Paasio
   Current source calibration by combination selection of minimum sized devices. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]
   
8. Jonne Poikonen, Ari Paasio
   On the topographic equivalence between voltage mode and current mode ranked order filters for array processors. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2006, pp:- [Conf]
   
9. 
   Effect of mismatch on a ranked-order extractor array [image processing applications]. [Citation Graph (, )][DBLP]
   
   
10. 
    A Gray-coded digital-to-analog converter for a mixed-mode processor array. [Citation Graph (, )][DBLP]
    
    
11. 
    Centroiding and classification of objects using a processor array with a scalable region of interest. [Citation Graph (, )][DBLP]