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Publications of Author

1. Reza Sedaghat
   A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:213-216 [Conf]
   
2. M. Reza Javaheri, Reza Sedaghat, Leo Kant, Jason Zalev
   Verification and fault synthesis algorithm at switch-level. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:4, pp:199-208 [Journal]
   
3. Hyunsuk Moon, Reza Sedaghat
   FPGA-Based adaptive digital predistortion for radio-over-fiber links. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:3, pp:145-154 [Journal]
   
4. Reza Sedaghat, Mayuri Kunchwar, Raha Abedi, M. Reza Javaheri
   Transistor-level to gate-level comprehensive fault synthesis for n-input primitive gates. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2006, v:46, n:12, pp:2149-2158 [Journal]