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An-Nan Suen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ming-Hwa Sheu, Jau-Yien Lee, Jhing-Fa Wang, An-Nan Suen, Lian-Ying Liu
    A High Throughput-Rate Architecture for 8*8 2-D DCT. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1578-1590 [Conf]
  2. An-Nan Suen, Jhing-Fa Wang, Yuen-Lin Chiang
    A Cepstrum Chip: Architecture and Implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1428-1431 [Conf]
  3. An-Nan Suen, Jhing-Fa Wang, Jia-Lang Lin
    VLSI architecture and implementation for FS1016 CELP decoder with reduced power and memory requirements. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:24, n:1, pp:79-97 [Journal]

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