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Yasuhiro Sugimoto:
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- Yasuhiro Sugimoto
A 1.6V 10-Bit 20MHz Current-Mode Sample and Hold Circuit. [Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1332-1335 [Conf]
- Shigeto Tanaka, Yuji Ghoda, Yasuhiro Sugimoto
The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC. [Citation Graph (0, 0)][DBLP] ISCAS (6), 2005, pp:6194-6197 [Conf]
- Hiroki Sakurai, Yasuhiro Sugimoto
Analysis and Design of a Current-Mode PWM Buck Converter Adopting the Output-Voltage Independent Second-Order Slope Compensation Scheme. [Citation Graph (0, 0)][DBLP] IEICE Transactions, 2005, v:88, n:2, pp:490-497 [Journal]
A current-mode DC-DC converter using a quadratic slope compensation scheme. [Citation Graph (, )][DBLP]
Hierarchical implicit feedback structure in passive dynamic walking. [Citation Graph (, )][DBLP]
Stabilization of quasi-passive-dynamic-walking based on delayed feedback control. [Citation Graph (, )][DBLP]
Simulating Adaptive Human Bipedal Locomotion Based on Phase Resetting Using Foot-Contact Information. [Citation Graph (, )][DBLP]
Demonstration and Analysis of Quadrupedal Passive Dynamic Walking. [Citation Graph (, )][DBLP]
Stabilizing Function of the Musculoskeletal System for Periodic Motion. [Citation Graph (, )][DBLP]
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