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Publications of Author

1. A. Prasad Vinod, Edmund Ming-Kit Lai
   Design of low complexity high-speed pulse-shaping IIR filters for mobile communication receivers. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2005, pp:352-355 [Conf]
   
2. A. Prasad Vinod, Edmund Ming-Kit Lai
   Comparison of the horizontal and the vertical common subexpression elimination methods for realizing digital filters. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2005, pp:496-499 [Conf]
   
3. A. Prasad Vinod, Edmund Ming-Kit Lai
   Optimizing vertical common subexpression elimination using coefficient partitioning for designing low complexity software radio channelizers. [Citation Graph (0, 0)][DBLP]
   ISCAS (6), 2005, pp:5429-5432 [Conf]
   
4. A. Prasad Vinod, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Chiew Tong Lau
   Optimization method for designing filter bank channelizer of a software defined radio using vertical common subexpression elimination. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2004, pp:437-440 [Conf]
   
5. A. Prasad Vinod, A. Benjamin Premkumar, Edmund Ming-Kit Lai
   An optimal entropy coding scheme for efficient implementation of pulse shaping FIR filters in digital receivers. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2003, pp:229-232 [Conf]
   
6. A. Prasad Vinod, A. Benjamin Premkumar
   A Memoryless Reverse Converter for the 4-Moduli Superset {2ⁿ-1, 2ⁿ, 2ⁿ+1, 2ⁿ⁺¹-1}. [Citation Graph (0, 0)][DBLP]
   Journal of Circuits, Systems, and Computers, 2000, v:10, n:1-2, pp:85-100 [Journal]
   
7. A. Prasad Vinod, Edmund Ming-Kit Lai
   On the implementation of efficient channel filters for wideband receivers by optimizing common subexpression elimination methods. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:295-304 [Journal]
   
8. A. Prasad Vinod, Edmund Ming-Kit Lai
   An efficient coefficient-partitioning algorithm for realizing low-complexity digital filters. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1936-1946 [Journal]
   
9. Himanshu Thapliyal, A. Prasad Vinod
   Designing Efficient Online Testable Reversible Adders With New Reversible Gate. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:1085-1088 [Conf]
   
10. R. Mahesh, A. Prasad Vinod
    Frequency Response Masking based Reconfigurable Channel Filters for Software Radio Receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2518-2521 [Conf]
    
11. Beilei Huang, Edmund Ming-Kit Lai, A. Prasad Vinod
    Sampling at Minimum Sampling Rate for Signals in Shift Invariant Spaces. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:4004-4007 [Conf]
    
12. S. Vijay, A. Prasad Vinod, Edmund Ming-Kit Lai
    A Greedy Common Subexpression Elimination Algorithm for Implementing FIR Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3451-3454 [Conf]
    
13. Himanshu Thapliyal, A. Prasad Vinod
    Design of Reversible Sequential Elements With Feasibility of Transistor Implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:625-628 [Conf]
    
14. R. Mahesh, A. Prasad Vinod
    An Architecture For Integrating Low Complexity and Reconfigurability for Channel filters in Software Defined Radio Receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2514-2517 [Conf]
    
15. K. G. Smitha, A. Prasad Vinod
    A New Binary Common Subexpression Elimination Method for Implementing Low Complexity FIR Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2327-2330 [Conf]
    
16. Chip-Hong Chang, Jiajia Chen, A. Prasad Vinod
    Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
17. A. Prasad Vinod, A. Singla, Chip-Hong Chang
    Improved differential coefficients-based low power FIR filters. Part I. Fundamentals. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
18. R. Mahesh, A. Prasad Vinod
    A new common subexpression elimination algorithm for implementing low complexity FIR filters in software defined radio receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
19. Himanshu Thapliyal, Hamid R. Arabnia, A. Prasad Vinod
    Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation [Citation Graph (0, 0)][DBLP]
    CoRR, 2006, v:0, n:, pp:- [Journal]
    
20. 
    Redundant Adders Consume Less Energy. [Citation Graph (, )][DBLP]
    
    
21. 
    A 2-D Systolic Array for High-Throughput Computation of 2-D Discrete Fourier Transform. [Citation Graph (, )][DBLP]
    
    
22. 
    Low Power FIR Filter Realization Using Minimal Difference Coefficients: Part II - Algorithm. [Citation Graph (, )][DBLP]
    
    
23. 
    Low Power FIR Filter Realization using Minimal Difference Coefficients: Part I - Complexity Analysis. [Citation Graph (, )][DBLP]
    
    
24. 
    Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics. [Citation Graph (, )][DBLP]
    
    
25. 
    Reduced-Complexity Concurrent Systolic Implementation of the Discrete Sine Transform. [Citation Graph (, )][DBLP]
    
    
26. 
    Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures. [Citation Graph (, )][DBLP]
    
    
27. 
    A reconfigurable low complexity architecture for channel adaptation in cognitive radio. [Citation Graph (, )][DBLP]
    
    
28. 
    Reconfigurable architecture for arbitrary sample rate conversion in software defined radios. [Citation Graph (, )][DBLP]
    
    
29. 
    Implementation of Low Power and High-Speed Higher Order Channel Filters for Software Radio Receivers. [Citation Graph (, )][DBLP]
    
    
30. 
    Reconfigurable Low Complexity Fir Filters for Software Radio Receivers. [Citation Graph (, )][DBLP]