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Byung-Do Yang :
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Byung-Do Yang , Lee-Sup Kim A low power charge sharing ROM using dummy bit lines. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2003, pp:377-380 [Conf ] Byung-Do Yang , Lee-Sup Kim A low power charge-recycling ROM architecture. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2001, pp:510-513 [Conf ] Byung-Do Yang , Lee-Sup Kim An error pattern ROM compression method for continuous data. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2004, pp:845-848 [Conf ] Byung-Do Yang , Lee-Sup Kim , Hyun-Kyu Yu A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2002, pp:373-376 [Conf ] Byung-Do Yang , Lee-Sup Kim A low-power ROM using single charge-sharing capacitor and hierarchical bit line. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2006, v:14, n:4, pp:313-322 [Journal ] Byung-Do Yang , Jae-Eun Lee , Jang-Su Kim , Junghyun Cho , Seung-Yun Lee , Byoung-Gon Yu A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:3014-3017 [Conf ] Byung-Do Yang , Lee-Sup Kim A low-power charge-recycling ROM architecture. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2003, v:11, n:4, pp:590-600 [Journal ] A highly accurate BiCMOS cascode current mirror for wide output voltage range. [Citation Graph (, )][DBLP ] Search in 0.001secs, Finished in 0.002secs