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Publications of Author

1. Xibo Zhang, Philip K. T. Mok, Mansun Chan, Ping K. Ko
   Large-signal and phase noise performance analysis of active inductor tunable oscillators. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2003, pp:705-708 [Conf]
   
2. Wei Chen, Wing-Hung Ki, Philip K. T. Mok, Mansun Chan
   Switched-capacitor power converters with integrated low dropout regulators. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2001, pp:293-296 [Conf]
   
3. V. S. L. Cheung, H. Luong, Mansun Chan
   A 0.9-V 0.2-/spl mu/W CMOS single-opamp-based switched-opamp /spl Sigma//spl Delta/ modulator for pacemaker applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2002, pp:185-188 [Conf]
   
4. Srinivasa R. Banna, Philip C. H. Chan, Mansun Chan, Samuel K. H. Fung, Ping K. Ko
   Fully depleted CMOS/SOI device design guidelines for low power applications. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1997, pp:301-306 [Conf]
   
5. Wei Jin, Philip C. H. Chan, Mansun Chan
   On the power dissipation in dynamic threshold silicon-on-insulator CMOS inverter. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1997, pp:247-250 [Conf]
   
6. Jin He, Xuemei Xi, Mansun Chan, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu
   A Non-Charge-Sheet Based Analytical Model of Undoped Symmetric Double-Gate MOSFETs Using SPP Approach. [Citation Graph (0, 0)][DBLP]
   ISQED, 2004, pp:45-50 [Conf]
   
7. Jin He, Jane Xi, Mansun Chan, Hui Wan, Mohan V. Dunga, Babak Heydari, Ali M. Niknejad, Chenming Hu
   Charge-Based Core and the Model Architecture of BSIM5. [Citation Graph (0, 0)][DBLP]
   ISQED, 2005, pp:96-101 [Conf]
   
8. Jin He, Xing Zhang, Ganggang Zhang, Mansun Chan, Yangyuan Wang
   A Complete Carrier-Based Non-Charge-Sheet Analytic Theory for Nano-Scale Undoped Surrounding-Gate MOSFETs. [Citation Graph (0, 0)][DBLP]
   ISQED, 2006, pp:115-120 [Conf]
   
9. Kathy Cheung, Cindy Hung, C. W. Kok, Mansun Chan
   A SMIL Browser with an Enhanced Image, Audio and Video Effect Library for Multimedia Rich Presentations. [Citation Graph (0, 0)][DBLP]
   IEEE Pacific Rim Conference on Multimedia, 2001, pp:861-866 [Conf]
   
10. Mansun Chan, Xuemei Xi, Jin He, Kanyu M. Cao, Mohan V. Dunga, Ali M. Niknejad, Ping K. Ko, Chenming Hu
    Practical compact modeling approaches and options for sub-0.1 mum CMOS technologies. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:3, pp:399-404 [Journal]
    
11. Tsz Yin Man, Mansun Chan
    A 2-bit highly scalable nonvolatile memory cell with two electrically isolated charge trapping sites. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:2, pp:349-354 [Journal]
    
12. R. Barsatan, Tsz Yin Man, Mansun Chan
    A zero-mask one-time programmable memory array for RFID applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
13. Yijin Wang, Ming Hsing, Chen Xu, Jiong Li, Mansun Chan
    A single chip micro-DNA-array system based on CMOS image sensor technology. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
14. 
    A high precision, output-capacitor-free low-dropout regulator for system-on-chip design. [Citation Graph (, )][DBLP]
    
    
15. 
    Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes. [Citation Graph (, )][DBLP]
    
    
16. 
    A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability. [Citation Graph (, )][DBLP]