The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

H. Asai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. Tantry, T. Yoneyama, H. Asai
    Two floating resistor circuits and their applications to synaptic weights in analog neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:564-567 [Conf]
  2. T. Watanabe, H. Asai
    Efficient synthesis technique of time-domain models for interconnects having 3-D structures based on FDTD method. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:266-269 [Conf]
  3. A. Kamo, T. Watanabe, H. Asai
    Expanded GMC for transient analysis of transmission line networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:33-36 [Conf]
  4. T. Oura, T. Yoneyama, S. Tantry, H. Asai
    A threshold voltage independent floating resistor circuit exhibiting both positive and negative resistance values. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:739-742 [Conf]
  5. H. Kubota, A. Kamo, T. Watanabe, H. Asai
    Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:649-552 [Conf]
  6. I. Hattori, A. Kamo, T. Watanabe, H. Asai
    Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:29-32 [Conf]
  7. H. Asai, S. C. Lee
    Design of Queuing Buffer Register Size. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1975, v:3, n:5, pp:147-152 [Journal]

  8. A low voltage floating resistor having positive and negative resistance values. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002