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H. Asai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. Tantry, T. Yoneyama, H. Asai
    Two floating resistor circuits and their applications to synaptic weights in analog neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:564-567 [Conf]
  2. T. Watanabe, H. Asai
    Efficient synthesis technique of time-domain models for interconnects having 3-D structures based on FDTD method. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:266-269 [Conf]
  3. A. Kamo, T. Watanabe, H. Asai
    Expanded GMC for transient analysis of transmission line networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:33-36 [Conf]
  4. T. Oura, T. Yoneyama, S. Tantry, H. Asai
    A threshold voltage independent floating resistor circuit exhibiting both positive and negative resistance values. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:739-742 [Conf]
  5. H. Kubota, A. Kamo, T. Watanabe, H. Asai
    Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:649-552 [Conf]
  6. I. Hattori, A. Kamo, T. Watanabe, H. Asai
    Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:29-32 [Conf]
  7. H. Asai, S. C. Lee
    Design of Queuing Buffer Register Size. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1975, v:3, n:5, pp:147-152 [Journal]

  8. A low voltage floating resistor having positive and negative resistance values. [Citation Graph (, )][DBLP]

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