M. Olivieri A genetic approach to the design space exploration of superscalar microprocessor architectures. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2001, pp:69-72 [Conf]
M. Olivieri Correction to "design of synchronous and asynchronous variable-latency pipelined multipliers". [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2001, v:9, n:4, pp:558-559 [Journal]
M. Olivieri Design of synchronous and asynchronous variable-latency pipelined multipliers. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2001, v:9, n:2, pp:365-376 [Journal]
M. Olivieri Theoretical system-level limits of power dissipation reduction under a performance constraint in VLSI microprocessor design. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2002, v:10, n:5, pp:595-600 [Journal]
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