The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Tero Kangas: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Erno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen
    Interfacing multiple processors in a system-on-chip video encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:478-481 [Conf]
  2. Tero Kangas, Kimmo Kuusilinna, Timo Hämäläinen
    TDMA-based communication scheduling in system-on-chip video encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:369-372 [Conf]
  3. Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen
    Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:354-363 [Conf]
  4. Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen
    A Communication-Centric Design Flow for HIBI-Based SoCs. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:474-483 [Conf]
  5. Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
    HIBI v.2 Communication Network for System-on-Chip. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:413-422 [Conf]
  6. Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna
    UML-based multiprocessor SoC design framework. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:281-320 [Journal]
  7. Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen
    Interconnection scheme for continuous-media systems-on-a-chip. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:123-138 [Journal]
  8. Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
    Benchmarking mesh and hierarchical bus networks in system-on-chip context. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:8, pp:477-488 [Journal]
  9. Heikki Orsila, Tero Kangas, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen
    Automated memory-aware application distribution for Multi-processor System-on-Chips. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:11, pp:795-815 [Journal]
  10. Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna
    HIBI Communication Network for System-on-Chip. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:185-205 [Journal]
  11. Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna
    Scalable Architecture for SoC Video Encoders. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:79-95 [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002