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S. Imai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Y. Sugimoto, S. Imai
    The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:132-135 [Conf]
  2. T. Yamada, S. Imai, S. Ueno
    On VLSI decompositions for deBruijn graphs. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:165-169 [Conf]

  3. Parasitic capacitance modeling for multilevel interconnects. [Citation Graph (, )][DBLP]

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