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Anindya Sundar Dhar: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ashis Kumar Mal, Arindam Basu, Anindya Sundar Dhar
    Sampled analog architecture for DCT and DST. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:825-828 [Conf]
  2. Arindam Basu, Ashis Kumar Mal, Anindya Sundar Dhar
    Digital controlled analog architecture for DCT and DST using capacitor switching. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:309-312 [Conf]
  3. Arindam Basu, Anindya Sundar Dhar
    Design Issues in Switched Capacitor Ladder Filters. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:862-865 [Conf]
  4. Ashis Kumar Mal, Anindya Sundar Dhar
    Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:666-669 [Conf]
  5. Ayan Banerjee, Anindya Sundar Dhar
    Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:7, pp:351-357 [Journal]
  6. C. Thakkar, Anindya Sundar Dhar
    Sampled analog architecture for 2-D DCT. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  7. Ayan Banerjee, Anindya Sundar Dhar, Swapna Banerjee
    FPGA realization of a CORDIC based FFT processor for biomedical signal processing. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2001, v:25, n:3, pp:131-142 [Journal]

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