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Shu-Shin Chin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sangjin Hong, Shu-Shin Chin, Magesh Sadasivam
    Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:733-736 [Conf]
  2. Shu-Shin Chin, Sangjin Hong, Suhwan Kim
    Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:158-166 [Conf]
  3. Sangjin Hong, Shu-Shin Chin
    Incorporating Power Reduction Mechanism in Arithmetic Core Design. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:249-250 [Conf]
  4. Sangjin Hong, Shu-Shin Chin, Petar M. Djuric, Miodrag Bolic
    Design and Implementation of Flexible Resampling Mechanism for High-Speed Parallel Particle Filters. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:47-62 [Journal]

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