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Douglas J. Gorny: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Katsuro Sasaki, Koichi Seki
    Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:353-358 [Conf]
  2. Raminder Singh Bajwa, Mitsuru Hiraki, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Koichi Seki, Katsuro Sasaki
    Instruction buffering to reduce power in processors for signal processing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:4, pp:417-424 [Journal]

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