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Jae-Joon Kim: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy
    A forward body-biased low-leakage SRAM cache: device and architecture considerations. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:6-9 [Conf]
  2. Ik Joon Chang, Jae-Joon Kim, Kaushik Roy
    Robust level converter design for sub-threshold logic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:14-19 [Conf]
  3. Saibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy
    Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:410-415 [Conf]
  4. Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy
    A forward body-biased low-leakage SRAM cache: device, circuit and architecture considerations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:3, pp:349-357 [Journal]

  5. Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies. [Citation Graph (, )][DBLP]


  6. Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. [Citation Graph (, )][DBLP]


  7. On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit. [Citation Graph (, )][DBLP]


  8. Design and Analysis of a Self-Repairing SRAM with On-Chip Monitor and Compensation Circuitry. [Citation Graph (, )][DBLP]


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