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Publications of Author

1. Stephen V. Kosonocky, Michael Immediato, Peter E. Cottrell, Terence B. Hook, Randy W. Mann, Jeff Brown
   Enchanced multi-threshold (MTCMOS) circuits using variable well bias. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2001, pp:165-169 [Conf]
   
2. Randy W. Mann, W. W. (Bill) Abadeer, Matthew J. Breitwisch, O. Bula, Jeff S. Brown, Bryant C. Colwill, Peter E. Cottrell, William T. Crocco Jr., Stephen S. Furkay, Michael J. Hauser, Terence B. Hook, Dennis Hoyniak, James M. Johnson, Chung Hon Lam, Rebecca D. Mih, J. Rivard, Atsushi Moriwaki, E. Phipps, Christopher S. Putnam, BethAnn Rainey, James J. Toomey, Mohammad Imran Younus
   Ultralow-power SRAM technology. [Citation Graph (0, 0)][DBLP]
   IBM Journal of Research and Development, 2003, v:47, n:5-6, pp:553-566 [Journal]
   
3. Terence B. Hook
   Automatic extraction of circuit models from layout artwork for a BiCMOS technology. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:6, pp:732-738 [Journal]
   
4. Terence B. Hook, David Harmon, Chuan Lin
   Plasma process-induced damage on thick (6.8 nm) and thin (3.5 nm) gate oxide: parametric shifts, hot-carrier response, and dielectric integrity degradation. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:5, pp:751-765 [Journal]
   
5. Terence B. Hook, Ronald Bolam, William Clark, Jay Burnham, Nivo Rovedo, Laura Schutz
   Negative bias temperature instability on three oxide thicknesses (1.4/2.2/5.2 nm) with nitridation variations and deuteration. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2005, v:45, n:1, pp:47-56 [Journal]