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Hironori Akamatsu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa
    A 0.5V/100 MHz over-VCC grounded data storage (OVGS) SRAM cell architecture with boosted bit-line and offset source over-driving schemes. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:49-54 [Conf]
  2. Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa
    A 0.5 V single power supply operated high-speed boosted and offset-grounded data storage (BOGS) SRAM cell architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:4, pp:377-387 [Journal]

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