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Akira Mochizuki: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama
    Multiple-Valued Dynamic Source-Coupled Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2003, pp:207-212 [Conf]
  2. Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama
    Multiple-Valued Current-Mode MOS Integrated Circuits Based on Dual-Rail Source-Coupled Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1994, pp:19-26 [Conf]
  3. Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama
    Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1995, pp:64-0 [Conf]
  4. Akira Mochizuki, Takahiro Hanyu
    Highly reliable Multiple-Valued Circuit Based on Dual-Rail Differential Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2006, pp:5- [Conf]
  5. Akira Mochizuki, Takeshi Kitamura, Hirokatsu Shirahama, Takahiro Hanyu
    Design of a Microprocessor Datapath Using Four-Valued Differential-Pair Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2006, pp:14- [Conf]
  6. Akira Mochizuki, Takashi Takeuchi, Takahiro Hanyu
    Intra-Chip Address-Presetting Data-Transfer Scheme Using Four-Valued Encoding. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2004, pp:192-197 [Conf]
  7. Naoya Onizawa, Akira Mochizuki, Takahiro Hanyu
    Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2005, pp:138-143 [Conf]

  8. High-Performance Multiple-Valued Comparator Based on Active-Load Dual-Rail Differential Logic for Crosstalk-Noise Reduction. [Citation Graph (, )][DBLP]


  9. Design of a Processing Element Based on Quaternary Differential Logic for a Multi-Core SIMD Processor. [Citation Graph (, )][DBLP]


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