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Makoto Ishida: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Shoji Kawahito, Y. Mitsui, Makoto Ishida, Tetsuro Nakamura
    Parallel Hardware Algorithms with Redundant Number Representations for Multiple-Valued Arithmetic VLSI. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1992, pp:337-345 [Conf]
  2. Yoshiko Kato, Takashi Hashimoto, Liew Yoke Ching, Hidekuni Takao, Kazuaki Sawada, Makoto Ishida
    Fabrication of JFET device on Si (111) for sensor interface array circuit. [Citation Graph (0, 0)][DBLP]
    IEICE Electronic Express, 2004, v:1, n:9, pp:243-247 [Journal]
  3. Shoji Kawahito, Makoto Ishida, Tetsuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi
    High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:1, pp:34-42 [Journal]
  4. Shoji Kawahito, Makoto Ishida, Tasuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi
    Author's Reply. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:639- [Journal]

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