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Mozammel H. A. Khan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pawel Kerntopf, Marek A. Perkowski, Mozammel H. A. Khan
    On Universality of General Reversible Multiple-Valued Logic Gates. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2004, pp:68-73 [Conf]
  2. Mozammel H. A. Khan, Marek A. Perkowski, Pawel Kerntopf
    Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2003, pp:146-153 [Conf]
  3. Mozammel H. A. Khan, Marek A. Perkowski, Mujibur R. Khan
    Ternary Galois Field Expansions for Reversible Logic and Kronecker Decision Diagrams for Ternary GFSOP Minimization. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2004, pp:58-67 [Conf]
  4. Mozammel H. A. Khan
    Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer. [Citation Graph (0, 0)][DBLP]
    Engineering Letters, 2006, v:13, n:2, pp:65-69 [Journal]
  5. Mozammel H. A. Khan, Marek A. Perkowski
    Quantum ternary parallel adder/subtractor with partially-look-ahead carry. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:7, pp:453-464 [Journal]

  6. GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits. [Citation Graph (, )][DBLP]


  7. Quantum Realization of Some Ternary Circuits Using Muthukrishnan-Stroud Gates. [Citation Graph (, )][DBLP]


  8. Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits. [Citation Graph (, )][DBLP]


  9. Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram. [Citation Graph (, )][DBLP]


  10. Quantum Realization of Multiple-Valued Feynman and Toffoli Gates without Ancilla Input. [Citation Graph (, )][DBLP]


  11. Scalable Architectures for Design of Reversible Quaternary Multiplexer and Demultiplexer Circuits. [Citation Graph (, )][DBLP]


  12. Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits. [Citation Graph (, )][DBLP]


  13. Design of Reversible/Quantum Ternary Comparator Circuits. [Citation Graph (, )][DBLP]


  14. Cost Reduction in Nearest Neighbour Based Synthesis of Quantum Boolean Circuits. [Citation Graph (, )][DBLP]


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