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Publications of Author

1. Dirk Stroobandt, Peter Verplaetse, Jan Van Campenhout
   Towards synthetic benchmark circuits for evaluating timing-driven CAD tools. [Citation Graph (0, 0)][DBLP]
   ISPD, 1999, pp:60-66 [Conf]
   
2. Peter Verplaetse
   Refinements of Rent's Rule Allowing Accurate Interconnect Complexity Modeling. [Citation Graph (0, 0)][DBLP]
   ISQED, 2001, pp:251-252 [Conf]
   
3. Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
   On rent's rule for rectangular regions. [Citation Graph (0, 0)][DBLP]
   SLIP, 2001, pp:49-56 [Conf]
   
4. Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
   Getting more out of Donath's hierarchical model for interconnect prediction. [Citation Graph (0, 0)][DBLP]
   SLIP, 2002, pp:9-16 [Conf]
   
5. Peter Verplaetse, Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
   On partitioning vs. placement rent properties. [Citation Graph (0, 0)][DBLP]
   SLIP, 2001, pp:33-40 [Conf]
   
6. Dirk Stroobandt, Peter Verplaetse, Jan M. Van Campenhout
   Generating synthetic benchmark circuits for evaluating CAD tools. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:9, pp:1011-1022 [Journal]
   
7. Peter Verplaetse, Dirk Stroobandt, Jan M. Van Campenhout
   A stochastic model for the interconnection topology of digital circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2001, v:9, n:6, pp:938-942 [Journal]
   
8. J. Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
   A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2003, v:11, n:1, pp:24-34 [Journal]