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Yogesh Singh Chauhan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yogesh Singh Chauhan, C. Anghel, Francois Krummenacher, Renaud Gillon, A. Baguenier
    A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:109-114 [Conf]
  2. Yogesh Singh Chauhan, Francois Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu
    A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:177-182 [Conf]

  3. Compact Modeling of Suspended Gate FET. [Citation Graph (, )][DBLP]


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