The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Dinesh Patil: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd
    A New Method for Design of Robust Digital Circuits. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:676-681 [Conf]
  2. Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman
    Robust Energy-Efficient Adder Topologies. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2007, pp:16-28 [Conf]

  3. Energy-delay tradeoffs in 32-bit static shifter designs. [Citation Graph (, )][DBLP]


  4. Processor Performance Modeling using Symbolic Simulation. [Citation Graph (, )][DBLP]


Search in 0.019secs, Finished in 0.019secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002