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Publications of Author

1. Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong
   Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. [Citation Graph (0, 0)][DBLP]
   ISQED, 2003, pp:344-347 [Conf]
   
2. 
   TSV stress aware timing analysis with applications to 3D-IC layout optimization. [Citation Graph (, )][DBLP]
   
   
3. 
   Overlay aware interconnect and timing variation modeling for double patterning technology. [Citation Graph (, )][DBLP]
   
   
4. 
   Double patterning layout decomposition for simultaneous conflict and stitch minimization. [Citation Graph (, )][DBLP]
   
   
5. 
   Crosstalk Noise Variation Assessment and Analysis for the Worst Process Corner. [Citation Graph (, )][DBLP]