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Uthman Alsaiari: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Uthman Alsaiari, Resve Saleh
    Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:703-710 [Conf]
  2. Uthman Alsaiari, Resve Saleh
    Testable and self-repairable structured logic design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  3. Partitioning for Selective Flip-Flop Redundancy in Sequential Circuits. [Citation Graph (, )][DBLP]


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